Hi all – Do you know of any ASIC implementations of general-purpose compression codecs other than gzip/deflate?

(FPGA is okay too, I guess, but I love ASICs...)

Relatedly, has anyone to your knowledge developed a compression codec designed for hardware implementation from the outset? What I mean is starting from first principles, taking everything we know about compression, and everything we know about how microprocessors work (or can be made to work in a custom design), and designing a compression codec in synergy with co-optimized hardware such that we see huge performance gains over the best software codecs.

A measure of optimality that incorporated energy use would be interesting in this context. A clean sheet co-design of codec and silicon is almost as much a physics challenge as anything.

One thing that strikes me is that we'd have to forget about linear, implicitly single threaded codecs, and even file formats. (Allowing ourselves the remit to co-design new file formats makes this more fun.) We could chunk files into dozens of pieces, but we'd need a codec that could efficiently and usefully parallelize the work on those pieces.

(Bonus question: Damn it, should deflate be capitalized or not?)