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Thread: SandyBridge-E memory controller

  1. #1
    Programmer Bulat Ziganshin's Avatar
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    SandyBridge-E memory controller

    interesting paper, unfortunately, in Russian:

    the most important graph, showing that SB-E is optimized for multithreaded memory access:
    Attached Thumbnails Attached Thumbnails Click image for larger version. 

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  2. #2
    Administrator Shelwien's Avatar
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    I've seen it too.
    It also confirms my observation that memory clock and latencies don't affect the compression speed at all
    (well, <5%).

    Quote Originally Posted by google translate

    Frequency of DDR3 memory modules are more important for the final performance characteristics than their latencies.
    Now we can say that with complete confidence.
    Even 1.5x better timings (for example, DDR3-1333) only leads to performance increased by an average of 1.6%,
    while increasing the memory frequency by 266MHz adds about 1.9% to average speed.
    However, both 1.6% and 1.9% are quite modest rates,
    forcing once again to say that the memory characteristics' effect on the speed of your computer is rather weak.
    Even such seemingly weighty modernization as changing 4-channel DDR3-1333 to
    4-channel DDR3-2133 is capable of bringing only a 4% increase in speed (on average).
    Of course, there are problems for which fast memory may be more
    important, but even especially sensitive WinRAR archiver's gain from increasing
    the memory frequency up by 60% is only 15%.

  3. #3
    Member Karhunen's Avatar
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    In my 1996 copy of "Computer Architecture: A Quantitative Approach" ISBN 1-55860-329-8 Chapter 5 "Memory-hierarchy Design" opens with a quote : Ideally one would desire an indefinitely large memory capacity such that any particular.. word would be immediately available... We are... forced to recognize the possibility of constructing a heirarchy of memories, each of which has greater capacity than the preceeding but which is less quickly accessible. A.W Burks, H.H. Goldstine, and J. von Neumann "Preliminary Discussion of the Logical Design of an Electronic Computing Instrument (1946)" I guess until we can have computing in memory its unlikely data storage will be anywhere near speeds of memory, and even then un-optimizeable (?) data dependencies will still exist.

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